软件数字下变频器的算法

Algorithm of software digital down converter

摘要: 采用相位累加算法实现数字控制振荡器, 利用线性内插方法结合级联积分梳妆滤波器实现分数比抽取滤波, 从而达到降低数字下变频器复杂性的目的, 使得数字下变频处理可以在通用数字信号处理芯片中用软件实现。应用Matlab软件进行分数比为29/31倍的抽取滤波仿真, 结果表明该算法提高了数字下变频器的处理速率, 实现了数字载波控制和抽取滤波可编程。
- 信息控制 /
- 软件无线电 /
- 线性内插 /
- 数字下变频 /
- 数字控制振荡器
Abstract: The paper put forward a design NCO (numerical controlled oscillator) with phase accumulation algorithm and fraction ratio decimation filter with mixing linear interpolation algorithm and CIC (cascaded integrator comb) filter, so that the DDC (digital down converter) process could be implemented in software on general purpose DSP (digital signal processing) chip and afford greater flexibility. Matlab simulation for a decimation filter whose decimation ratio is 29/31 was made. The results indicate that the algorithm improves the speed of DDC and implements programmable NCO and decimation filter by design software DDC with high performance DSP.
- information control /
- software radio /
- linear interpolation /
- DDC /
- NCO

图 1 数字下变频器结构

Figure 1. DDC structure

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图 2 CORDIC原理

Figure 2. CORDIC principle

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图 3 相位累加振荡器结构

Figure 3. Structure of phase accumulator oscillator

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图 4 相位累加振荡器虚拟仪器仿真结果

Figure 4. VI simulation result of phase accumulator oscillator

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图 5 线性内插结构

Figure 5. Structure of linear interpolation

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图 6 29/31倍抽取仿真

Figure 6. 29/31 ratio decimation filter simulation

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